Hi! I am Safiullah Khan. I am a Ph.D. candidate in Computer Engineering at Gachon University, South Korea.
Email: safi AT gachon DOT ac DOT kr
Email: safi AT ieee DOT org
My research interests lie at the intersection of cryptography, digital hardware design, and computer architecture. I implement the cryptographic protocols (lightweight and post-quantum) on hardware platforms and suggest the possible optimization strategies. The goal of my research is to gain maximum efficiency with respect to computation time and hardware area consumption, simultaneously, as there exist a deep trade-off between both of these two parameters. Further, I work to make the implementations application specific and address the cyberattacks that deliberately target hardware layer vulnerabilities, especially for Internet of Things (IoT) applications. I work with the FPGA and microcontroller implementations, however FPGAs are main focus.
I am working as a Ph.D. Candidate in Information Security and Machine Learning (ISML) Lab at Gachon University, Seongnam, South Korea under the supervision of a Prof. Dr. Seong Oun Hwang. My responsibilities include but are not limited to, 1) propose and publish novel research-based articles to high impact factor journals, 2) collaborate with other team members in lab as well as with the researchers from international labs. I actively participate in national and international level projects in ISML Lab, 3) Writing International & National level research proposals, 4) More specifically, I am working towards performing optimizations on the cryptographic protocols being implemented in FPGA platforms. I have closely worked with the Centre for Secure Information Technologies, Belfast University with the efficient hardware implementation of post-quantum cryptography.
In addition to my research activities at Gachon University, I am also serving as a co-teacher with Prof. Seong Oun Hwang for the graduate course, "The latest digital convergence". The course focus on the convergence of hardware and software technologies and is designed to provide the introduction to the corresponding hardware implementations for the latest crypto and AI algorithms. My primary responsibilities are delivering lectures, designing assignments, assign and evaluate semester projects, and discussion sessions during office hours as well as exam preparation and grading.
As a research assistant at Information Security Lab, I worked on the implementation of the lightweight cryptographic protocols for the FPGA platform. I devised different implementation strategies for lightweight encryption and authentication protocols, submitted to the NIST standardization competition, and made these protocols suitable for various applications in a smart city environment.
I worked in the Research and Development department of NRTC. My responsibilities at NRTC mainly included the design and customization of the printed circuit boards (PCBs) for FPGAs, design of PCBs for GHz Radio Frequency applications. I was also involved in writing the Verilog codes to program FPGAs, translating the codes from high-level languages to the low-level languages. I have also worked work with the crypto research group to develop the hardware designs for the cryptographic applications.
At COMSATS, I worked as Lab Engineer for two undergraduate courses 1) Digital Logic Design (DLD) and 2) VLSI Design. During my job, my responsibilities primarily included instructing students about the experiments being held at DLD laboratory and VLSI laboratory. I supervised and evaluated students' semester projects. Moreover, I drafted homework and quizzes, conducted discussion sessions during office hours, prepared exams, and finalized the lab grading.
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